Fujimoto Kuniaki

基本情報

Undergraduate School of Humanities and Science / Department of Human Information Engineering
Graduate School of Science and Technology / Course of Science and Technology

Manufacturing technology (mechanical, electrical/electronic, chemical engineering) Electronic devices and equipment
Informatics Computer systems

Best Paper Award A Wide Range Manhattan Distance Search Circuit Using Neuron CMOS Inverters
Contribution Award
Excellent Paper Award A Minimum Manhattan Distance Retrieving Circuit Using Neuron CMOS Inverters
Outstanding Paper Award A Study on Flash Type A/D Converter Using Neuron CMOS Inverter

Low-Power Hamming Distance Detection Circuit Using Cross-Coupled Electronic Neuron.

A Range Hamming Distance Search Associative Memory Based on Electronic Neurons Using Interconnect Capacitance

A Proposal of PLL Using Digital Controlled Oscillator Based on Multi-Phase Clock

A Study of High-Speed Hamming Distance Detection Circuit Utilizing a Neuron CMOS Inverter

DESIGN OF FREQUENCY MULTIPLIER BASED ON DOUBLE-EDGE COUNTER AND ITS ANALYSIS

A STUDY OF A MINIMUM EUCLIDEAN DISTANCE SEARCH CIRCUIT FOR AN ASSOCIATIVE MEMORY

Hydrogeochemical factors controlling the fluoride concentration in spring/groundwater in Aso caldera in the volcanic region, Japan

DIGITAL FREQUENCY-LOCKED LOOP WITH WIDE LOCK-IN RANGE AND LOW FREQUENCY ERROR BASED ON MULTI-PHASE CLOCK

APPROACHES TO REMOTE LEARNING DURING COVID-19 IN THE SCHOOL OF INDUSTRIAL AND WELFARE ENGINEERING, TOKAI UNIVERSITY

An Electronic Neuron Using Interconnect Capacitance and Applied to a Variable Logic Circuit

DIGITAL FREQUENCY-LOCKED LOOP WITH LOW FREQUENCY ERROR BASED ON MULTI-PHASE CLOCK

A Study of Digitally Controlled Oscillator Based on Multi-Phase Clock

Digital frequency-locked loop based on double-edge counter

Detection of Land Cover Changes before and after the 2016 Kumamoto Earthquake in Japan Using Remote Sensing for Evaluation of Environmental Impacts

Multiple output of similarity data by recalling type associative memory using neuron CMOS inverter

Analysis by fpd for neuron CMOS variable logic circuit with fg calibration

A flash type a/d converter using neuron cmos inverters with threshold compensation circuits

A reset type 2-mode digital fll with anti-pseudo-lock function and phase control

Voltage characteristics of a hamming distance search circuit in voltage domain using clocked neuron cmos inverter

A 1+n/k frequency divider unrelated to duty ratio of multi-phase clock

Land Cover Change Detection before and after the 2016 Kumamoto Earthquake Using Remote Sensing
A-1-22 A Study on Dividing Circuit with Multi-Phase Input Clocks
A Study on Dividing Ratio Changeable m Multiplication Circuit with Delay Circuit.
A-1-12 A Study on Analog Digital Mixed PLL
Dividing Ratio Changeable All Digital Phase Locked Loop with Low Jitter
A Proposition on Reset Type Fast Pull-in PLL Using Frequency difference
A Proposition on Multiple Frequency Digital PLL Using Fractional Divider
A Proposition on Digital FLL using pulse counter
A proposal for a non-pseudo-locked FLL
A Proposition on Digital PLL using pulse counter
A Proposal on Pulse Train Arithmetic Circuits Using Switched-Current
A Proposal on Pulse Train Multiplier Circutis Using Switched-Capacitor.
A study of digital locked loop on pulse number count system
A Proposal on Pulse number Arithmetic Circuits Using Switched-Capacitor
A proposition on Noisie-less DC-AC Converter using Switched Capacitor Circuits
CMOS Ternary Cycling Circuits ang Ternary D-Iatch Circuits